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fa531x series 25 fa5310bp(s), fa5314p(s), fa5316p(s) fa5311bp(s), fa5315p(s), fa5317p(s) n description the fa531x series are bipolar ics for switching power supply control that can drive a power mosfet. these ics contain many functions in a small 8-pin package. with these ics, a high-performance and compact power supply can be created because not many external discrete components are needed. n features ? drive circuit for connecting a power mosfet ? wide operating frequency range (5 to 600khz) ? pulse-by-pulse overcurrent limiting function ? overload cutoff function (latch or non-protection mode selectable) ? output on/off control function by external signal ? overvoltage cutoff function in latch mode ? undervoltage malfunction prevention function ? low standby current (90 m a typical) ? exclusive choices by circuits (see selection guide on page 25) ? 8-pin package (dip/sop) n applications ? switching power supply for general equipment bipolar ic for switching power supply control n dimensions, mm sop-8 6.05 5.3 8.2 0.3 0.4 0.1 1.27 0.2 0.6 0.20 +0.1 ?.05 0~10 1 4 8 5 2.0max dip-8 fa531x series n block diagram fa5310bp(s)/fa5311bp(s)/fa5316p(s)/fa5317p(s) fa5314p(s)/fa5315p(s) 1 8 5 4 9.3 6.5 7.6 3.4 4.5max 1.5 3.0min 0~15? 0~15? 0.5 0.1 2.54 0.25 0.3 +0.1 ?.05 pin pin description no. symbol 1 rt oscillator timing resistor 2 fb feedback 3 is (+) overcurrent (+) detection 4 gnd ground 5 out output 6 vcc power supply 7 ct oscillator timing capacitor 8 cs soft-start and on/off control pin pin description no. symbol 1 rt oscillator timing resistor 2 fb feedback 3 is (C) overcurrent (C) detection 4 gnd ground 5 out output 6 vcc power supply 7 ct oscillator timing capacitor 8 cs soft-start and on/off control
fa531x series 26 n selection guide type fa5310bp(s) 46% + 16.0v 8.70v 1.5a forward type fa5311bp(s) 70% + 16.0v 8.70v 1.5a flyback type fa5314p(s) 46% C 15.5v 8.40v 1.5a forward type fa5315p(s) 70% C 15.5v 8.40v 1.5a flyback type fa5316p(s) 46% + 15.5v 8.40v 1.0a forward type fa5317p(s) 70% + 15.5v 8.40v 1.0a flyback type max. duty cycle (typ.) polarity of overcurrent detection max. output current uvlo (typ.) application on threshold off threshold notes: * 1 derating factor ta > 25 c : 8.0mw/ c (on pc board ) * 2 derating factor ta > 25 c : 5.5mw/ c (on pc board ) n absolute maximum ratings item symbol rating unit supply voltage v cc 31 v output current fa5310/11/14/15 i o 1.5 a fa5316/17 1.0 feedback terminal input voltage v fb 4v overcurrent detection v is C0.3 to +4 v terminal input voltage cs terminal input current i cs 2ma total power dissipation p d 800 (dip-8) * 1 mw (ta=25 c) 550 (sop-8) * 2 operating temperature t opr C30 to +85 c junction temperature t j 125 c storage temperature t stg C40 to +150 c n recommended operating conditions item symbol min. max. unit supply voltage v cc 10 30 v oscillator timing resistance fa5310/11 r t 3.3 10 k w fa5314/15/16/17 1 10 soft-start capacitor c s 0.1 1 m f oscillation frequency f osc 5 600 khz soft-start circuit section item symbol test condition fa5310/14/16 fa5311/15/17 unit min. typ. max. min. typ. max. charge current (pin 8) i chg pin 8=0v C15 C10 C5 C15 C10 C5 m a input threshold voltage (pin 8) v th cso duty cycle =0% 0.90 0.90 v v th csm duty cycle = d max 1.90 2.30 v n electrical characteristics (ta=25 c, vcc=18v, f osc =135khz) oscillator section item symbol test condition min. typ. max. unit oscillation frequency f osc r t =5.1k w , c t =360pf 125 135 145 khz frequency variation 1 (due to supply voltage change) f dv v cc =10 to 30v 1% frequency variation 1 (due to temperature change) f dr ta=C30 to +85 c 1.5 % pulse width modulation circuit section item symbol test condition fa5310/14/16 fa5311/15/17 unit min. typ. max. min. typ. max. feedback terminal source current i fb v fb =0 C660 C800 C960 C660 C800 C960 m a input threshold voltage (pin 2) v th fbo duty cycle =0% 0.75 0.75 v v th fbm duty cycle = d max 1.80 2.30 v maximum duty cycle d max 43 46 49 66 70 74 %
fa531x series 27 overcurrent limiting circuit section item symbol test condition fa5310/11/16/17 fa5314/15 unit min. typ. max. min. typ. max. input threshold voltage (pin 3) v th is 0.21 0.24 0.27 C0.21 C0.17 C0.14 v overcurrent detection terminal source current i is pin 3=0v C300 C200 C100 C240 C160 C80 m a delay time t pd is 150 200 ns latch-mode cutoff circuit section item symbol test condition min. typ. max. unit cs terminal sink current i sink cs pin 8=6v, pin 2=1v 25 45 65 m a cutoff threshold voltage (pin 8) v th cs 6.5 7.0 7.5 v overload cutoff circuit section item symbol test condition min. typ. max. unit cutoff-start voltage (pin 2) v th fb 2.6 2.8 3.1 v undervoltage lockout circuit section item symbol test condition fa5310/11 fa5314/15/16/17 unit min. typ. max. min. typ. max. off-to-on threshold voltage v cc on 15.5 16.0 16.5 14.8 15.5 16.2 v on-to-off threshold voltage v cc off 8.20 8.70 9.20 7.70 8.40 9.10 v overall device item symbol test condition min. typ. max. unit standby current i cc st v cc =14v 90 150 m a operating-state supply current i cc op 915ma off-state supply current i cc off 1.1 1.8 ma cutoff-state supply current i ccl 1.1 1.8 ma output section item symbol test condition min. typ. max. unit fa5310/11/14/15 fa5316/17 l-level output voltage v ol i o =100ma i o =50ma 1.30 1.80 v h-level output voltage v oh i o =C100ma i o =C50ma 16.0 16.5 v v cc =18v v cc =18v rise time tr no load no load 50 ns fall time tf no load no load 50 ns output on/off circuit section item symbol test condition min. typ. max. unit cs terminal source current i source cs pin 8=0v C15 C10 C5 m a off-to-on threshold voltage (pin 8) v th on cs terminal voltage off ? on 0.56 v on-to-off threshold voltage (pin 8) v th off cs terminal voltage on ? off 0.42 v
28 fa531x series n description of each circuit 1. oscillator (see block diagram) the oscillator generates a triangular waveform by charging and discharging a capacitor. ct pin voltage oscillates between an upper limit of approx. 3.0v and a lower limit of approx. 1.0v. the oscillation frequency is determined by a external resistance and capacitance shown in figure 1, and approximately given by the following equation: the recommended oscillation range is between 5k and 600khz. the oscillator output is connected to a pwm comparator. 2. feedback pin circuit figure 2 gives an example of connection in which an optocoupler is used to couple the feedback signal to the fb pin. it is designed to be strong against noise and will not create parasitic oscillation so much, because the output impedance at the fb pin is as low as 4k to 5k. if this circuit causes power supply instability, the frequency gain can be decreased by connecting r 4 and c 4 as shown in figure 2. r 4 should be between several tens of ohms to several kiloohms and c 4 should be between several thousand picofarads to one microfarads. 3. pwm comparator the pwm comparator has four inputs as shown in figure 3. oscillator output ? is compared with cs pin voltage , fb pin voltage a , and dt voltage . the lowest of three inputs , a , and is compared with output ? . if it is lower than the oscillator output, the pwm comparator output is high, and if it is higher than the oscillator output, the pwm comparator output is low (see fig. 4). the ic output voltage is high during when the comparator output is low, and the ic output voltage is low during when the comparator output is high. when the ic is powered up, cs pin voltage controls soft start operation. the output pulse then begins to widen gradually. during normal operation, the output pulse width is determined within the maximum duty cycle set by dt voltage under the condition set by feedback signal a , to stabilize the output voltage. f (kh z ) = 10 6 .........(1) fig. 1 oscillator fig. 2 configuration with optocoupler (fb pin input) fig. 3 pwm comparator fig. 4 pwm comparator timing chart 4r t (k w ) ? c t (pf)
29 fa531x series 4. cs pin circuit as shown in figure 5 capacitor c s is connected to the cs pin. when power is turned on, the constant current source (10 m a) begins to charge capacitor c s . accordingly, the cs pin voltage rises as shown in figure 6. the cs pin is connected to an input of the pwm comparator. the device is in soft-start mode while the cs pin voltage is between 0.9v and 1.9v (fa5310/14/16) and between 0.9v and 2.3v(fa5311/15/17). during normal operation, the cs pin is clamped at 3.6v by internal zener diode zn. if the output voltage drops due to an overload, etc., the clamp voltage shifts from 3.6v to 8.0v. as a result, the cs pin voltage rises to 8.0v. the cs pin is also connected to latch comparator c2. if the pin voltage rises above 7.0v, the output of comparator c2 goes high to turn off the bias circuit, thereby shutting the output down. comparator c2 can be used not only for shutdown in response to an overload, but also for shutdown in response to an overvoltage. comparator c1 is also connected to the cs pin, and the bias circuit is turned off and the output is shut down if the cs pin voltage drops below 0.42v. in this way, comparator c1 can also be used for output on/off control. as explained above, the cs pin can be used for soft-start operation, overload and overvoltage output shutdown and output on/off control. further details on the four functions of the cs pin are given below. 4.1 soft start function figure 7 shows the soft start circuit. figure 8 is the soft-start operation timing chart. the cs pin is connected to capacitor c s . when power is turned on, a 10 m a constant-current source begins to charge the capacitor. as shown in the timing chart, the cs pin voltage rises slowly in response to the charging current. the cs pin is connected internally to the pwm comparator. the comparator output pulse slowly widens as shown in the timing chart. the soft start period can be approximately evaluated by the period ts from the time the ic is activated to the time the output pulse width widens to 30%. period ts is given by the following equation: t s (m s )=160c s ( m f)...................................(2) fig. 5 cs pin circuit fig. 6 cs pin waveform fig. 7 soft-start circuit fig. 8 soft-start timing chart
30 fa531x series 4.2 overload shutdown figure 9 shows the overload shutdown circuit, and figure 10 is a timing chart which illustrates overload shutdown operation. if the output voltage drops due to an overload or short-circuit, the output voltage of the fb pin rises. if fb pin voltage exceeds the reference voltage (2.8v) of comparator c3, the output of comparator c3 switches low to turn transistor q off. in normal operation, transistor q is on and the cs pin is clamped at 3.6v by zener diode zn. with q off, the clamp is released and the 10 m a constant-current source begins to charge capacitor c s again and the cs pin voltage rises. when the cs pin voltage exceeds the reference voltage (7.0v) of comparator c2, the output of comparator c2 switches high to turn the bias circuit off. the ic then enters the latched mode and shuts the output down. shutdown current consumption is 400 m a(v cc =9v). this current must be supplied through the startup resistor. the ic then discharges the mosfet gates. shutdown operation initiated by an overload can be reset by lowering supply voltage v cc below v cc off or forcing the cs pin voltage below 7.0v. the period t ol from the time that the output is short-circuited to the time that the bias circuit turns off is given by the following equation: t ol (m s )=340cs( m f)................................ ........... (3) 4.3 overvoltage shutdown figure 11 shows the overvoltage shutdown circuit, and figure 12 is a timing chart which illustrates overvoltage shutdown operation. the optocoupler pc1 is connected between the cs and v cc pins. if the output voltage rises too high, the pc1 turns on to raise the voltage at the cs pin via resistor r 6 . when the cs pin voltage exceeds the reference voltage (7.0v) of comparator c2, comparator c2 switches high to turn the bias circuit off. the ic then enters the latched mode and shuts the output down. the shutdown current consumption of the ic is 400 m a(v cc =9v). this current must be applied via startup resistor r 5 . the ic then discharges the mosfet gates. the shutdown operation initiated by an overvoltage condition can be reset by lowering supply voltage v cc below v cc off or forcing the cs pin voltage below 7.0v. during normal operation, the cs pin is clamped by a 3.6v zener diode with a sink current of 65 m a max. therefore, a current of 65 m a or more must be supplied by the optocoupler in order to raise the cs pin voltage above 7.0v. fig. 9 overload shutdown circuit fig. 10 overload shutdown timing chart fig. 11 overvoltage shutdown circuit fig. 12 overvoltage shutdown timing chart
31 fa531x series 4.4 output on/off control the ic can be turned on and off by an external signal applied to the cs pin. figure 13 shows the external output on/off control circuit, and figure 14 is the timing chart. the ic is turned off if the cs pin voltage falls below 0.42v. the output of comparator c1 switches high to turn the bias circuit off. this shuts the output down. the ic then discharges the mosfet gates. the ic turns on if the cs pin is opened for automatic soft start. the power supply then restarts operation. 5. overcurrent limiting circuit the overcurrent limiting circuit detects the peak value of every drain current pulse of the main switching mosfet to limit the overcurrent. the detection threshold is + 0.24v for fa5310b/11b/16/17 with respect to ground as shown in figure 15. the drain current of the mosfet is converted to voltage by resistor r 7 and fed to the is pin of the ic. if the voltage exceeds the reference voltage (0.24v) of comparator c4, the output of comparator c4 goes high to set flip-flop output q high. the output is immediately turned off to shut off the current. flip-flop output q is reset on the next cycle by the output of the oscillator to turn the output on again. this operation is repeated to limit the overcurrent. if the overcurrent limiting circuit malfunctions due to noise, place an rc filter between the is pin and the mosfet. figure 16 is a timing chart which illustrates current-limiting operations. fig. 13 external output on/off control circuit fig. 14 timing chart for external output on/off control fig. 16 overcurrent timing chart for fa5310/11/16/17 fig. 15 overcurrent limiting circuit for fa5310/11/16/17
32 fa531x series the detection threshold is -0.17v for fa5314/15 with respect to ground as shown in figure 17. the operation is similar to that of fa5310b/11b/16/17 except the threshold is minus voltage compared to that which is plus voltage for fa5310b/11b/16/17. figure 18 is a timing chart which illustrates current limiting operations. 6. undervoltage lockout circuit the ic incorporates a circuit which prevents the ic from malfunctioning when the supply voltage drops. when the supply voltage is raised from 0v, the ic starts operation with v cc =v cc on . if the supply voltage drops, the ic shuts its output down when v cc =v cc off . when the undervoltage lockout circuit operates, the cs pin goes low to reset the ic. 7. output circuit as shown in figure 19, the ic's totem-pole output can directly drive the mosfet. the out pin can source and sink currents of up to 1.5a or 1.0a. if ic operation stops when the undervoltage lockout circuit operates, the gate voltage of the mosfet goes low and the mosfet is shut down. fig. 17 overcurrent limiting circuit for fa5314/15 fig. 18 overcurrent timing chart for fa5314/15 fig. 19 output circuit cs pin voltage (3.6v) dt voltage fb pin voltage oscillator output out pin output h l is ( ?) pin voltage comparator c4 reference voltage (?0.17v) bias voltage off overcurrent limiting minus detection
33 fa531x series n design advice 1. startup circuit it is necessary to start-up ic that the voltage inclination of vcc terminal dvcc/dt satisfies the following equation(4). dvcc/dt(v/s)>1.8/cs( m f)...............................(4) cs : capacitor connected between cs terminal and gnd note that equation (4) must be satisfied in any condition. also, it is necessary to keep latch mode for overload protection or overvoltage protection that the current supplied to vcc terminal through startup resistor satisfies the following equation(5). icc(lat)> 0.4ma for vcc % 9.2v ..................(5) icc(lat) : cutoff-state( = latch mode ) supply current the detail is explained as follows. (1) startup circuit connected to ac line directly fig. 20 shows a typical startup circuit that a startup resistor rc is connected to ac line directly. the period from power-on to startup is determined by rc, r d and c a . rc, r d and c a must be designed to satisfy the following equations. dvcc/dt(v/s)= (1/c a ) ? {(v ave Cvccon )/r c Cvccon/r d Ciccst} > 1.8/(cs( m f))................................................(6) rc(k w )< (v ave C9.2(v))/{0.4 (ma) + (9.2(v)/r d (k w ) } ...........(7) v ave = vac ? e 2/ p : average voltage applied to ac line side of rc vac: ac input effective voltage vccon: on threshold of uvlo, 16.5v(max.) or 16.2v(max.) iccst: standby current, 0.15 ma(max.) in this method, vcc voltage includes ripple voltage influenced by ac voltage. therefore, enough dvcc/dt required by equation (6) tend to be achieved easily when vcc reaches to vccon even if vcc goes up very slowly. after power-off, vcc does not rise up because a voltage applied from bias winding to vcc terminal decreases and the current flowing r c be- comes zero, therefore, re-startup does not occur after vcc falls down below off threshold of uvlo until next power-on. fig. 20 startup circuit example(1)
34 fa531x series (2) startup circuit connected to rectified line this method is not suitable for fa531x, especially concerned with re-startup operation just after power-off or startup which ac input voltage goes up slowly. fig. 21 shows a startup circuit that a startup resistor r a is connected to rectified line directly. the period from power-on to startup is determined by r a , r b and c a . r a , r b and c a must be designed to satisfy the following equations. dvcc/dt(v/s)= (1/c a )?{( v in Cvccon )/r a C vccon/r b Ciccst } > 1.8/(cs( m f))..........................................(8) r a (k w ) < ( v in C 9.2(v) )/{ 0.4(ma) + ( 9.2(v)/r b (k w ) ) }....(9) v in : e 2 ? (ac input effective voltage) after power-off, once v cc falls down below off threshold voltage, v cc rises up again and re-startup occurs while the capacitor c 1 is discharged until approximately zero because v cc voltage rises up by the current flowing r a . this operation is repeated several times. after the repeated operation, ic stops in the condition that v cc voltage is equal to vccon (=on threshold) because capacitor c 1 is discharged gradually and the decreased v cc inclination is out of the condition required by equation (4). after that, re- startup by power-on can not be guaranteed even when equation (8) is satisfied. the image of that the startup is impossible is shown in fig. 22. it is necessary to startup ic that supply current icc(startup) to vcc is over 4ma in the condition of tj < 100 c during vcc is kept at vccon( 6 16v, balance state at vccon after the repeated operation. icc(start-up) > 4ma at vcc=vccon, tj<100 c, after power-off this balance state that startup is impossible tends to occur at higher temperature. if power-on is done when vcc is not kept at vccon (for example:power-off is done and after enough time that c1 is discharged until vcc can not be pulled up to vccon), the ic can startup in the condition given by equation(8). in some cases, such as when the load current of power supply is changed rapidly, you may want to prolong the hold time of the power supply output by means of maintaining vcc over the off threshold. for this purpose, connect diode d4 and electrolytic capacitor c4 as shown in fig. 23. this prolongs the hold time of the power supply voltage vcc regardless of the period from power- on to startup. fig. 21 startup circuit example(2) fig. 22 a image of waveform when re-startup is impossible fig. 23 startup circuit example(3) startup is impossible power on power off vccon vccoff startup is impossible (dvcc/dt <1.8/cs just before vcc reaches vccon). icc>4ma is necessary for startup at tj <100 c and dvcc/dt=0.
35 fa531x series 2. disabling overload shutdown function as shown in figure 24, connect a 11k w resistor between the fb pin and ground. then, the cs pin voltage does not rise high enough to reach the reference voltage (7.0v) of the latch comparator, and the ic does not enter the off latch mode. with this connection, the overvoltage shutdown function is available. 3. setting soft start period and off latch delay independently figure 25 shows a circuit for setting the soft start period and off latch delay independently. in this circuit, capacitance c s determines the soft start period, and capacitance c l determines the off latch delay. if the overload shutdown and overvoltage shutdown functions raise the cs pin voltage to around 5v, zener diode zn becomes conductive to charge c l . the off latch delay can be thus prolonged by c l . 4. laying out v cc and ground lines figure 26 and 27 show the recommended layouts of v cc and ground lines. the bold lines represent paths carrying large currents. the lines must have an adequate thickness. 5.sink current setting for cs terminal a sink current to cs terminal must be satisfied the following condition to prevent from the malfunction which uncontrolled pulse output generates at out terminal when latch-mode protection should be operated for overvoltage. 65 m a < ics(sink) < 500 m a at vcs= 6.5(v) ics(sink) : sink current to cs terminal example (for the circuit shown in fig. 28 ) ics(sink) = (28(v)C18(v)C 6.5(v) )/7.5(k w ) 6 467 ( m a) < 500 ( m a) fig. 24 disabling overload shutdown function fig. 25 independent setting of soft-start period and off latch delay fig. 27 vcc line and ground line (2) for fa5314/15 fig. 26 vcc line and ground line (1) for fa5310b/11b/16/17 fig. 28 setting sink current for cs terminal cs vcc 7.5k 18v zener diode under 500 a
36 fa531x series fig. 29 out terminal voltage wavefrom 6. notice for high frequency operation (1) the final pulse these ics have the original characteristics about the pulse width at out terminal when the ic is stopped by undervoltage lockout, on/off function, or latched mode for overload or overvoltage. when the ic is stopped, the final pulse width is 2 m s(max.) longer than normal pulse width as shown in figure. 29. here, normal pulse width "a m s" is determined by measured condition of the power supply unit, and whole width of final pulse is "a+2 m s(max.)". take care of a longer pulse mentioned above for designing or testing the circuit of power supply units. (2) power dissipation and heating the power dissipation of ic increases and the temperature becomes higher in proportion to the operating frequency, because the driving power of a switching device and the through current of output stage of ic increase. determine the oscillation frequency so that the junction temperature (tj) does not rise to 125?c. tj is calculated as following equation roughly. tj = tc + q j - c ? vcc ? icc tc: case temperature q j-c: thermal resistance between the junction vcc: v cc voltage and the case (=50?c/w) i cc : supply current at the vcc terminal
37 fa531x series n characteristic curves (ta=25 c) oscillation frequency (f osc ) vs. oscillation frequency (f osc ) vs. ambient temperature (ta) timing capacitor capacitance (c t ) output duty cycle vs. fb terminal voltage (v fb ) output duty cycle vs. fb terminal source current (i source ) output duty cycle vs. cs terminal voltage (v cs ) cs terminal sink current (i sink cs ) vs. cs terminal voltage (v cs )
38 fa531x series h-level output voltage (v oh ) vs. output source current (i source ) fa5310/11/14/15 fa5316/17 5 4 3 v cc ? oh [v] 2 1 0 10 ? 10 ? 25 10 0 2 i source [a] 2 5 v cc =18v l-level output voltage(v ol ) vs. output sink current (i sink ) fa5310/11/14/15 fa5316/17 5 4 3 v ol [v] 2 1 0 10 ? 10 ? 25 10 0 2 i sink [a] v cc =18v 2 5 is (+) terminal threshold voltage (v th is(+) ) vs. is (C) terminal threshold voltage (v th is(C) ) vs. ambient temperature (ta) ambient temperature (ta) fa5310/11/16/17 fa5314/15 ?90 ?80 ?70 v this(? [mv] ?60 ?50 ?40 ?5 0 25 50 75 100 t a [?c]
39 fa531x series is (+) terminal current (i is(+) ) vs. is (-) terminal current (i is(-) ) vs. is (+) terminal voltage (v is(+) ) is (-) terminal voltage (i is(-) ) fa5310/11/16/17 fa5314/15 v is(+) [v] i is(+) [ a] ?00 ?00 0 0.1 0.2 0.3 0.4 0.5 0.6 ?00 0 100 200 300 400 500 600 v is(? [v] i is(? [ a] ?0 ?0 0 ?.1 ?.2 ?.3 ?.4 ?.5 ?0 ?00 ?0 ?20 ?40 ?60 ?80 ?00 supply current (i cc ) vs. supply voltage (v cc ) ordinary operation fa5310/11 fa5314/15/16/17 0.1 0 5 10 15 v cc [v] i cc [ma] 20 25 fosc=600khz fosc=135khz 30 0.2 5 6 7 8 9 10 11 0.1 0 5 10 15 v cc [v] i cc [ma] 20 25 30 0.2 5 6 7 8 9 10 11 fosc=600khz fosc=135khz supply current (i cc ) vs. supply voltage (v cc ) off or off latch mode fa5310/11 fa5314/15/16/17 v cc [v] i cc [ma] 0.2 0 5 10 15 20 25 30 0.4 0.6 0.8 1.2 1.0 1.4 1.6 1.8 2.0 v cc [v] i cc [ma] 0.2 0 5 10 15 20 25 30 0.4 0.6 0.8 1.2 1.0 1.4 1.6 1.8 2.0
40 fa531x series n application circuit example of fa5310b application circuit example of fa5311b application circuit
41 fa531x series example of fa5314 application circuit example of fa5315 application circuit
42 fa531x series example of fa5316 application circuit example of fa5317 application circuit parts tolerances characteristics are not defined in the circuit design sample shown above. when designing an actual circuit for a product, you must determine parts tolerances and characteristics for safe and economical operation.

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